DATA SHEET

The Frame Relay Serial Communications Controller module implements the data link layer of the Frame Relay protocol. It is available in HDL source code written in either Verilog or VHDL. The following are the technical specifications:

Supported Standards

The Frame Relay SCC module is compliant with the following Frame Relay standards:

ITU-T. Recommendation Q.922 (1992), ISDN Data Link Layer Specification for Frame Mode Bearer Services.
ANSI T1.618-1991 (R2003) ISDN - Core Aspects of Frame Protocol for Use with Frame Relay Bearer Service.
Pacific Bell PUB L-780079-PB (1993), Frame Relay Interface Specification.

Hardware Description Language Support

The design is offered as an HDL source code. The following languages are supported:

VHDL
Verilog HDL

Simulation Support

An HDL source code test bench accompanies the design to aid in simulation. Its functionality can be verified on any simulator of customer’s choice. The module has been tested on the following dual-language simulators:

ModelSim
Aldec

Integration Support

To aid the integration of the design in a customer’s system, the following interfaces are provided:

Genaric FIFO Data Path
Wishbone SoC Bus
CoreConnect

Implementation Supportt

The module’s compact and portable source code can be easily implemented in a variety of FPGA, CPLD, and ASIC architectures. The implementation has been successfully tested in programmable devices from the following vendors:

Altera
Cypress
Xilinx

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